IEC 60191-6 Ed. 3.0 b

$155.00

Mechanical standardization of semiconductor devices – Part 6: General rules for the preparation of outline drawings of surface mounted semiconductor device packages

Published by Publication Date Number of Pages
IEC 11/26/2009 76

Description

IEC 60191-6 Ed. 3.0 b – Mechanical standardization of semiconductor devices – Part 6: General rules for the preparation of outline drawings of surface mounted semiconductor device packages

IEC 60191-6:2009 gives general rules for the preparation of outline drawings of surface-mounted semiconductor devices. It supplements IEC 60191-1 and IEC 60191-3. It covers all surface-mounted devices discrete semiconductors with lead count of greater or equal to 8, as well as integrated circuits classified as form E in Clause 3 of IEC 60191-4. This third edition of IEC 60191-6 cancels and replaces the second edition, published in 2004 and constitutes a technical revision. This edition includes the following significant changes with respect to the previous edition:
a) scope is modified to cover all surface-mounted devices discrete semiconductors with lead count of greater or equal to 8;
b) editorial modifications on several pages; and
c) technical revision to ball grid array package (BGA) especially its geometrical drawing format. (two types of BGA would unify as one type as a result of revising drawing format.

Product Details

Edition:
3.0
Published:
11/26/2009
Number of Pages:
76
File Size:
1 file , 1.2 MB
Note:
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